CSC/ECE 506 Fall 2007/wiki1 4 la

Update section 1.1.3: Architectural Trends

Microprocessor Design Trends

The textbook discusses that up to 1986, advancement in microprocessors were dominated by bit-level parallelism. It started with 4-bit datapaths, followed by 8-bit, 16-bit and 32-bit wide datapaths. In server design, the norm has been established to be at 64-bit since the start of the millennium. A 128-bit datapath is rarely mentioned to be used in microprocessors. However, graphics processors have been using 128-bit wide datapaths and it is possible to see an increase to 256-bit wide datapaths soon, especially with the advancements in computer graphics, animations and gaming.

Instruction-level parallelism took off as advancements in bit-level parallelism receded. After all, the benefits possible by advancements in bit-level parallelism are limited to the ability to address more storage space and the ability to do more in a single cycle. The latter benefit has been limited to more precise floating point calculation although some microprocessors have the ability to bundle a couple of instructions into one.

The period within the 1980's and 1990's indeed set the stage for the modern microprocessor. Superscalar microprocessors were created, which encompassed branch predictors, out-of-order execution, deeper and larger levels of cache on chip, cache coherency protocols and the ability to communicate with other microprocessors on chip. Research done in the 1990's and early 2000's set the stage for the next level of parallelism to be exploited: thread-level parallelism.

Two technologies appeard in the 2000's that altered the microprocessor performance race. The first is Multiple Cores on chip and the second is Simultaneous Multi-Threading (SMT) (also known as Hyper-Threading). Industry refrained at this point from using the clock speed as the performance metric since a microprocessor encompassed many more intertwined technologies than merely speeding up the clock cycle. The industry has seen two cores on a single chip. Then, it saw cores taking advantage of SMT. The number of cores and the number of threads exploited in a microprocessor are ever increasing. Both core and thread technologies are increasing in the number of threads they are able to support. Dual core processors and dual thread processors are already in existence with the promise to merge both technologies so each core can support two threads. There are microprocessors in existence today with four and eight cores, with the promise of sixteen cores on a chip in a matter of months.

Figures

http://upload.wikimedia.org/wikipedia/commons/3/32/Procs.JPG http://upload.wikimedia.org/wikipedia/commons/5/5e/Bandwidth.JPG

References

http://www.endian.net/details.aspx?ItemNo=655 http://www-05.ibm.com/se/news/sv/2007/05/power-timeline.html http://www-03.ibm.com/servers/eserver/pseries/hardware/whitepapers/power/ppc_arch.html http://www.theinquirer.net/?article=9235 http://www.sun.com/processors/