User contributions for Mrshah2
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6 February 2012
- 21:1921:19, 6 February 2012 diff hist +140 CSC/ECE 506 Spring 2012/1c dm →Programmable Systolic Array
- 21:1821:18, 6 February 2012 diff hist +2 CSC/ECE 506 Spring 2012/1c dm →Reconfigurable Systolic Array
- 21:1721:17, 6 February 2012 diff hist +372 m CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computershttp://en.wikipedia.org/wiki/Flynn's_taxonomyhttp://www.phy.ornl.gov/csep/ca/node11.html
- 21:1521:15, 6 February 2012 diff hist +141 CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computershttp://en.wikipedia.org/wiki/Flynn's_taxonomyhttp://www.phy.ornl.gov/csep/ca/node11.html
- 21:0621:06, 6 February 2012 diff hist −18 m CSC/ECE 506 Spring 2012/1c dm →Implementations of MISD architecture
- 21:0321:03, 6 February 2012 diff hist +48 m CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computershttp://en.wikipedia.org/wiki/Flynn's_taxonomyhttp://www.phy.ornl.gov/csep/ca/node11.html
- 21:0121:01, 6 February 2012 diff hist +26 CSC/ECE 506 Spring 2012/1c dm →Multiple Processors Implementation in Boeing 777http://www.citemaster.net/getdoc/8767/R8.pdf Y.C. (Bob) Yeh, Boeing Commercial Airplane Group, "Triple-Triple Redundant 777 Primary Flight Computer"
- 20:5820:58, 6 February 2012 diff hist +132 CSC/ECE 506 Spring 2012/1c dm →Multiple Processors Implementation in Boeing 777http://www.citemaster.net/getdoc/8767/R8.pdf Y.C. (Bob) Yeh, Boeing Commercial Airplane Group, "Triple-Triple Redundant 777 Primary Flight Computer"
- 15:4215:42, 6 February 2012 diff hist −7 m CSC/ECE 506 Spring 2012/1c dm →Historyhttp://http://en.wikipedia.org/wiki/Systolic_array
- 15:4015:40, 6 February 2012 diff hist +43 m CSC/ECE 506 Spring 2012/1c dm →The Flight Control System – MISD Example for fault tolerance
- 15:0815:08, 6 February 2012 diff hist +662 CSC/ECE 506 Spring 2012/1c dm →History:http://en.wikipedia.org/wiki/Fault-tolerant_computer_system#History
- 15:0215:02, 6 February 2012 diff hist +145 m CSC/ECE 506 Spring 2012/1c dm →History:http://en.wikipedia.org/wiki/Fault-tolerant_computer_system#History
- 14:3914:39, 6 February 2012 diff hist +138 m CSC/ECE 506 Spring 2012/1c dm →Multi Processor Systems
- 14:3814:38, 6 February 2012 diff hist +116 CSC/ECE 506 Spring 2012/1c dm →Multi Processor Systems
- 14:3614:36, 6 February 2012 diff hist +263 CSC/ECE 506 Spring 2012/1c dm →Overview
31 January 2012
- 04:2504:25, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Multiple Processors Implementation in Boeing 777http://www.citemaster.net/getdoc/8767/R8.pdf Y.C. (Bob) Yeh, Boeing Commercial Airplane Group, "Triple-Triple Redundant 777 Primary Flight Computer"
- 04:0904:09, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Special-purpose systolic array
- 04:0604:06, 31 January 2012 diff hist −3 CSC/ECE 506 Spring 2012/1c dm →History:http://en.wikipedia.org/wiki/Fault-tolerant_computer_system#History
- 02:4702:47, 31 January 2012 diff hist +81 CSC/ECE 506 Spring 2012/1c dm →Special-purpose systolic array
- 02:4202:42, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Multiple Processors Implementation in Boeing 777http://www.citemaster.net/getdoc/8767/R8.pdf Y.C. (Bob) Yeh, Boeing Commercial Airplane Group, "Triple-Triple Redundant 777 Primary Flight Computer"
- 02:4202:42, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →History:http://en.wikipedia.org/wiki/Fault-tolerant_computer_system#History
- 02:4102:41, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Reconfigurable Systolic Array
- 02:4102:41, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Programmable Systolic Array
- 02:4002:40, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Special-purpose systolic array
- 02:3602:36, 31 January 2012 diff hist +1 CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computershttp://en.wikipedia.org/wiki/Flynn's_taxonomyhttp://www.phy.ornl.gov/csep/ca/node11.html
- 02:3002:30, 31 January 2012 diff hist −16 CSC/ECE 506 Spring 2012/1c dm →Reconfigurable Systolic Array
- 02:2902:29, 31 January 2012 diff hist −5 CSC/ECE 506 Spring 2012/1c dm →Reconfigurable Systolic Array
- 02:2802:28, 31 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Multiple Processors Implementation in Boeing 777http://www.citemaster.net/getdoc/8767/R8.pdf Y.C. (Bob) Yeh, Boeing Commercial Airplane Group, "Triple-Triple Redundant 777 Primary Flight Computer"
- 02:2702:27, 31 January 2012 diff hist +13 CSC/ECE 506 Spring 2012/1c dm →Overview
- 02:2602:26, 31 January 2012 diff hist −79 CSC/ECE 506 Spring 2012/1c dm →Other Architectures
- 01:4601:46, 31 January 2012 diff hist +115 CSC/ECE 506 Spring 2012/1c dm →Multiple Processors Implementation in Boeing 777http://www.citemaster.net/getdoc/8767/R8.pdf Y.C. (Bob) Yeh, Boeing Commercial Airplane Group, "Triple-Triple Redundant 777 Primary Flight Computer
- 01:4301:43, 31 January 2012 diff hist +331 CSC/ECE 506 Spring 2012/1c dm →Fault Tolerant Systems
30 January 2012
- 12:3412:34, 30 January 2012 diff hist −32 m CSC/ECE 506 Spring 2012/1c dm →History: (Wikipedia – Fault Tolerance)
- 12:2912:29, 30 January 2012 diff hist +182 CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computers
- 12:2812:28, 30 January 2012 diff hist 0 N File:SIMD.PNG No edit summary current
- 12:2812:28, 30 January 2012 diff hist 0 N File:MISD.PNG No edit summary current
- 12:2812:28, 30 January 2012 diff hist 0 N File:MIMD.PNG No edit summary current
- 12:2412:24, 30 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Single Instruction, Single Data stream (SISD)
- 12:2312:23, 30 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Single Instruction, Single Data stream (SISD)
- 12:2312:23, 30 January 2012 diff hist −1 CSC/ECE 506 Spring 2012/1c dm →Single Instruction, Single Data stream (SISD)
- 12:2212:22, 30 January 2012 diff hist 0 CSC/ECE 506 Spring 2012/1c dm →Single Instruction, Single Data stream (SISD)
- 12:2212:22, 30 January 2012 diff hist +68 CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computers
- 12:2012:20, 30 January 2012 diff hist 0 N File:SISD.PNG No edit summary current
- 12:1812:18, 30 January 2012 diff hist +10 CSC/ECE 506 Spring 2012/1c dm →Flynn’s Taxonomy of Parallel Computers
- 03:3503:35, 30 January 2012 diff hist +1 CSC/ECE 506 Spring 2012/1c dm →Multi processor Systems
- 03:3503:35, 30 January 2012 diff hist +66 CSC/ECE 506 Spring 2012/1c dm →Multi processor Systems
- 03:3303:33, 30 January 2012 diff hist 0 N File:Flynn's Taxonomy.PNG No edit summary current
- 03:3203:32, 30 January 2012 diff hist +2 CSC/ECE 506 Spring 2012/1c dm No edit summary
- 03:3103:31, 30 January 2012 diff hist +1,551 N CSC/ECE 506 Spring 2012/1c dm Created page with "==Overview== This wiki article explores the Multiple Instruction Single Data architecture of multi processors as classified by Flynn’s Taxonomy. The article starts with a desc..."
- 03:2903:29, 30 January 2012 diff hist +35 ECE506 Main Page →Supplements to Solihin Text
