CSC/ECE 506 Spring 2013/10b ps: Difference between revisions
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[http://homes.cs.washington.edu/~djg/papers/asf_micro2010.pdf http://homes.cs.washington.edu/~djg/papers/asf_micro2010.pdf] <br /> | [http://homes.cs.washington.edu/~djg/papers/asf_micro2010.pdf http://homes.cs.washington.edu/~djg/papers/asf_micro2010.pdf] <br /> | ||
[http://people.ee.duke.edu/~sorin/papers/asplos10_consistency.pdf http://people.ee.duke.edu/~sorin/papers/asplos10_consistency.pdf] <br /> | [http://people.ee.duke.edu/~sorin/papers/asplos10_consistency.pdf http://people.ee.duke.edu/~sorin/papers/asplos10_consistency.pdf] <br /> | ||
[http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.06.07c.pdf http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.06.07c.pdf] | |||
[http://en.wikipedia.org/wiki/Memory_ordering http://en.wikipedia.org/wiki/Memory_ordering] | |||
Revision as of 17:43, 1 April 2013
References
http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.html
http://pic.dhe.ibm.com/infocenter/lnxinfo/v3r0m0/topic/liaaw/ordering.2006.03.13a.pdf
http://dl.acm.org/citation.cfm?id=1941553.1941594
http://home.deib.polimi.it/speziale/tech/memory_consistency/mc.html
http://homes.cs.washington.edu/~djg/papers/asf_micro2010.pdf
http://people.ee.duke.edu/~sorin/papers/asplos10_consistency.pdf
http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.06.07c.pdf
http://en.wikipedia.org/wiki/Memory_ordering