CSC/ECE 506 Spring 2012/12b ad: Difference between revisions
No edit summary |
|||
| Line 3: | Line 3: | ||
==Introduction== | ==Introduction== | ||
The full content of this article will be posted later today; please check again later. | ''The full content of this article will be posted later today; please check again later.'' | ||
As the number of processors in multiple-processor systems increases, increasing consideration needs to be given to how those processors communicate. With current technology, for a small number of processors shared-memory arrangements are quite effective. However, as the number of processors increases contention for available resources (memory, bus time, etc) increases, negatively impacting performance of the system. However, keeping these processors all on the same physical piece of hardware is convenient and helps performance due to physical proximity. As such, it is desirable to design hardware where many cores are part of the same die while allowing for the performance gains possible with interconnections. Recently there has been more research into these “on-chip interconnects,” and this article will explore the state of those efforts. | |||
==Summary== | ==Summary== | ||
Revision as of 02:10, 17 April 2012
On-chip Interconnects
Introduction
The full content of this article will be posted later today; please check again later.
As the number of processors in multiple-processor systems increases, increasing consideration needs to be given to how those processors communicate. With current technology, for a small number of processors shared-memory arrangements are quite effective. However, as the number of processors increases contention for available resources (memory, bus time, etc) increases, negatively impacting performance of the system. However, keeping these processors all on the same physical piece of hardware is convenient and helps performance due to physical proximity. As such, it is desirable to design hardware where many cores are part of the same die while allowing for the performance gains possible with interconnections. Recently there has been more research into these “on-chip interconnects,” and this article will explore the state of those efforts.
Summary
See Also
References
<references></references>