CSC/ECE 506 Spring 2012/8a cj: Difference between revisions

From Expertiza_Wiki
Jump to navigation Jump to search
No edit summary
Line 12: Line 12:
=Protocol Performance=
=Protocol Performance=
=References=
=References=
# [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4606981&tag=1]
# [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4606981&tag=1 The research of the inclusive cache used in multi-core processor]

Revision as of 13:30, 20 March 2012

MSI, MESI, MESIF, and MOESI protocols on real architectures

MSI Protocol

Figure 1: MSI State Diagram

MESI Protocol

Figure 2: MESI State Diagram

Five State Protocols

MOESI

Figure 3: MOESI State Diagram

MESIF

Figure 4: Reduced Traffic with MESIF Protocol [1]

Protocol Performance

References

  1. The research of the inclusive cache used in multi-core processor
Retrieved from "https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2012/8a_cj&oldid=60141"