CSC/ECE 506 Fall 2007/wiki1 4 a1: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
|||
| Line 1: | Line 1: | ||
== Architectural Trends == | == Architectural Trends == | ||
=== VLIW(Very Long Instruction Word) === | === VLIW(Very Long Instruction Word) === | ||
one VLIW instruction encodes multiple operations; specifically, one instruction encodes at least one operation for each execution unit of the device. For example, if a VLIW device has five execution units, then a VLIW instruction for that device would have five operation fields, each field specifying what operation should be done on that corresponding execution unit. To accommodate these operation fields, VLIW instructions are usually at least 64 bits in width, and on some architectures are much wider. | |||
=== Multi-threading === | === Multi-threading === | ||
Revision as of 02:00, 5 September 2007
Architectural Trends
VLIW(Very Long Instruction Word)
one VLIW instruction encodes multiple operations; specifically, one instruction encodes at least one operation for each execution unit of the device. For example, if a VLIW device has five execution units, then a VLIW instruction for that device would have five operation fields, each field specifying what operation should be done on that corresponding execution unit. To accommodate these operation fields, VLIW instructions are usually at least 64 bits in width, and on some architectures are much wider.