CSC/ECE 506 Fall 2007/wiki3 8 a1: Difference between revisions
| Line 12: | Line 12: | ||
The protocols discussed here are managed by the scalable system by using a directory-based approach. Information on all cache blocks is kept in a directory that is associated with each block of memory. When a cache miss arises the directory information is checked and all other caches containing a copy of the desired block are contacted. The information contained in the directories consists of a dirty bit, and some state information that will allow action to be taken when there is a cache miss and the directory information needs to be referenced. | The protocols discussed here are managed by the scalable system by using a directory-based approach. Information on all cache blocks is kept in a directory that is associated with each block of memory. When a cache miss arises the directory information is checked and all other caches containing a copy of the desired block are contacted. The information contained in the directories consists of a dirty bit, and some state information that will allow action to be taken when there is a cache miss and the directory information needs to be referenced. | ||
== SSCI (Simple Scalable Coherence Interface) protocol == | == SSCI (Simple Scalable Coherence Interface) protocol ==D | ||
The IEEE SCI protocol is a very large and in-depth protocol that is used in real world scalable machines when coherence is a necessity. Due to its size and complexity it is much easier to gain a basic understanding of the SCI protocol by studying a similar, smaller protocol. The SSCI protocol, like its name says, is a simpler version of SCI | |||
== IEEE SCI (Scalable Coherence Interface) protocol == | == IEEE SCI (Scalable Coherence Interface) protocol == | ||
Revision as of 03:48, 18 October 2007
Topic Background
The protocols discussed here were created to allow cache coherence to be maintained on a system that has no global bus system that allows snooping to take place, and, has distributed memory that is physically separated. These systems usually consist of PCM (Processor-Control-Memory) nodes connected by a network; the systems also have network assists to allow communication to take place.
For a system to be coherent it must:
- Provide a state machine for the protocol
- Manage the coherence protocol
- Determine when the coherence protocol should be used
- Find information on the current cache block in other caches
- Find out where other copies of the current cache block are located
- Communicate with the other copies
The protocols discussed here are managed by the scalable system by using a directory-based approach. Information on all cache blocks is kept in a directory that is associated with each block of memory. When a cache miss arises the directory information is checked and all other caches containing a copy of the desired block are contacted. The information contained in the directories consists of a dirty bit, and some state information that will allow action to be taken when there is a cache miss and the directory information needs to be referenced.
== SSCI (Simple Scalable Coherence Interface) protocol ==D The IEEE SCI protocol is a very large and in-depth protocol that is used in real world scalable machines when coherence is a necessity. Due to its size and complexity it is much easier to gain a basic understanding of the SCI protocol by studying a similar, smaller protocol. The SSCI protocol, like its name says, is a simpler version of SCI
IEEE SCI (Scalable Coherence Interface) protocol
History
SSCI and IEE SCI Protocol Similarities
IEE SCI Protocol Additional States
Links
IEEE SCI Standard Abstract and Content Summary -
http://standards.ieee.org/reading/ieee/std_public/description/busarch/1596-1992_desc.html
IEEE SCI on ieexplore -
http://ieeexplore.ieee.org/iel5/285/3365/00113656.pdf?tp=&arnumber=113656&isnumber=3365
4BA2 Technology Survery on SCI (good overview) -
http://ntrg.cs.tcd.ie/undergrad/4ba2.05/group12/index.html
References
CSC/ECE 506 Lecture Notes, Fall 2007