CSC/ECE 506 Spring 2011/ch7 ss: Difference between revisions
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This article discusses these three issues and how they can be solved efficiently to meet programmer's requirements. A related topic - [http://en.wikipedia.org/wiki/Translation_lookaside_buffer TLB] coherence - is also dealth with. The wiki supplement also addresses the challenges that [http://en.wikipedia.org/wiki/Peterson%27s_algorithm Peterson's algorithm] demonstrates. | This article discusses these three issues and how they can be solved efficiently to meet programmer's requirements. A related topic - [http://en.wikipedia.org/wiki/Translation_lookaside_buffer TLB] coherence - is also dealth with. The wiki supplement also addresses the challenges that [http://en.wikipedia.org/wiki/Peterson%27s_algorithm Peterson's algorithm] demonstrates. | ||
= Cache Coherence = | |||
Revision as of 21:56, 12 March 2011
Though the migration from uniprocessor system to multiprocessing systems is not new, the world of parallel computers is undergoing a continuous change. Parallel computers, which started as high-end super-computing systems for carrying out huge calculations, are now ubiquitous and are present in all mainstream architectures for servers, desktops, and embedded systems. In order to design parallel architectures to meet programmer's needs and expectations more closely, exciting and challenging changes exist. The three main areas which are being considered by scientists today are: cache coherence, memory consistency and synchronization.
This article discusses these three issues and how they can be solved efficiently to meet programmer's requirements. A related topic - TLB coherence - is also dealth with. The wiki supplement also addresses the challenges that Peterson's algorithm demonstrates.