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Latest revision as of 03:11, 29 March 2012
An IA32 system, from virtual page VP1 to physical page PP1, starting from the root of the page table (i.e., CR3 register) and traversing the intermediate PTEs (i.e., PDPE and PDE)<ref>http://people.ee.duke.edu/~sorin/papers/hpca10_unitd.pdf</ref>
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current | 03:11, 29 March 2012 | 344 × 296 (10 KB) | Aupreti (talk | contribs) | ||
03:11, 29 March 2012 | 344 × 296 (10 KB) | Aupreti (talk | contribs) | An IA32 system, from virtual page VP1 to physical page PP1, starting from the root of the page table (i.e., CR3 register) and traversing the intermediate PTEs (i.e., PDPE and PDE)<ref>http://people.ee.duke.edu/~sorin/papers/hpca10_unitd.pdf<references/> | ||
03:09, 29 March 2012 | 344 × 296 (10 KB) | Aupreti (talk | contribs) | An IA32 system, from virtual page VP1 to physical page PP1, starting from the root of the page table (i.e., CR3 register) and traversing the intermediate PTEs (i.e., PDPE and PDE)<ref>http://people.ee.duke.edu/~sorin/papers/hpca10_unitd.pdf<ref/> | ||
03:08, 29 March 2012 | 344 × 296 (10 KB) | Aupreti (talk | contribs) | An IA32 system, from virtual page VP1 to physical page PP1, starting from the root of the page table (i.e., CR3 register) and traversing the intermediate PTEs (i.e., PDPE and PDE)<ref>http://people.ee.duke.edu/~sorin/papers/hpca10_unitd.pdf</ref> |
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