CSC/ECE 506 Spring 2012/7b yw: Difference between revisions
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Revision as of 20:35, 18 March 2012
Introduction
In this chapter we will first introduce the concept of virtual address memories, more precisely, virtually addressed caches. Pros and cons of virtually addressed caches are discussed. Then we discuss the need for TLB, a cache-like construct that translate virtual address to physical address. Then we raise the issue of TLB coherence.