Chapter 2b: Data parallelism in GPUs - Revision history

Capsang at 01:20, 31 January 2012

2012-01-31T01:20:32Z

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	In this code, the main function simply calls a specialized routine (called Kernel (-link-)), and passes in the 3 arrays that need to be processed parallely.		In this code, the main function simply calls a specialized routine (called Kernel (-link-)), and passes in the 3 arrays that need to be processed parallely.
	It also informs the CUDA runtime (-link-) to create 1000 threads, where each thread runs the same VecAdd routine, but on different data. As can be seen from the code, in the VecAdd routine, we are finding the thread index and acting only on that index of the input arrays. Hence each of the 1000 threads acts on a different location and performs the computation. This helps us achieve exponential performance improvements, which becomes evident when dealing with super-parallel applications such as those mentioned above.		It also informs the CUDA runtime (-link-) to create 1000 threads, where each thread runs the same VecAdd routine, but on different data. As can be seen from the code, in the <code>VecAdd</code> routine, we are finding the thread index and acting only on that index of the input arrays. Hence each of the 1000 threads acts on a different location and performs the computation. This helps us achieve exponential performance improvements, which becomes evident when dealing with super-parallel applications such as those mentioned above.

			== Example2 illustrating more CUDA features ==
	== Other well known Applications ==		== Other well known Applications ==
	Password guessing		Password guessing
	3D rendering,etc		3D rendering,etc
	http://www.infoworld.com/d/developer-world/gpu-computing-about-massive-data-parallelism-263		http://www.infoworld.com/d/developer-world/gpu-computing-about-massive-data-parallelism-263

Capsang: /* CUDA solution */

2012-01-31T01:17:56Z

CUDA solution

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	=== CUDA solution ===		=== CUDA solution ===
	Because the same program (set of instructions) is executed for each data element, there is a lower requirement for sophisticated flow control, and because it is executed on many data elements ~~and has~~ high arithmetic intensity~~, the memory access latency can be hidden with calculations instead of big data caches~~.		Because the same program (set of instructions) is executed for each data element, there is a lower requirement for sophisticated flow control, and because it is executed on many data elements, it exhibits high arithmetic intensity. GPU is specialized for compute-intensive, highly parallel computation – exactly what graphics rendering is about – and therefore designed such that more transistors are devoted to data processing rather than data caching and flow control. Hence GPU (more specifically CUDA) would be the best answer to such a problem.
	GPU is specialized for compute-intensive, highly parallel computation – exactly what graphics rendering is about – and therefore designed such that more transistors are devoted to data processing rather than data caching and flow control. Hence GPU (more specifically CUDA) would be the best answer to a problem ~~like the above~~.

	Similar to what we did with the two processor, multi-threaded solution, CUDA enables us to create thousands of threads and run them parallely on thousands of Processing units that GPU provides. Following C program illustrates how this can be achieved:		Similar to what we did with the two processor, multi-threaded solution, CUDA enables us to create thousands of threads and run them parallely on thousands of Processing units that GPU provides. Following C program illustrates how this can be achieved:

Capsang: /* Solution */

2012-01-31T01:15:45Z

Solution

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	== Solution ==		== Solution ==

	The pattern that exists in all of ~~this problem~~ is that, there's one instruction or a single set of instructions that act on a large amount of distinct data elements (SIMD - link). This is a typical pattern where data parallelism can be applied.		The pattern that exists in all of these problems is that, there's one instruction or a single set of instructions that act on a large amount of distinct data elements (SIMD - link). This is a typical pattern where data parallelism can be applied.

	In a two processor (or two core) system, we could have both the processing units (cores) work on a part of the array simultaneously.		In a two processor (or two core) system, we could have both the processing units (cores) work on a part of the array simultaneously.
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	In this code, the main function simply calls a specialized routine (called Kernel (-link-)), and passes in the 3 arrays that need to be processed parallely.		In this code, the main function simply calls a specialized routine (called Kernel (-link-)), and passes in the 3 arrays that need to be processed parallely.
	It also informs the CUDA runtime (-link-) to create 1000 threads, where each thread runs the same VecAdd routine, but on different data. As can be seen from the code, in the VecAdd routine, we are finding the thread index and acting only on that index of the input arrays. Hence each of the 1000 threads acts on a different location and performs the computation. This helps us achieve exponential performance improvements, which becomes evident when dealing with super-parallel applications such as those mentioned above.		It also informs the CUDA runtime (-link-) to create 1000 threads, where each thread runs the same VecAdd routine, but on different data. As can be seen from the code, in the VecAdd routine, we are finding the thread index and acting only on that index of the input arrays. Hence each of the 1000 threads acts on a different location and performs the computation. This helps us achieve exponential performance improvements, which becomes evident when dealing with super-parallel applications such as those mentioned above.

	== Other well known Applications ==		== Other well known Applications ==

Capsang: /* Basics of CUDA GPU */

2012-01-31T01:14:47Z

Basics of CUDA GPU

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	== Basics of CUDA GPU ==		== Basics of CUDA GPU ==
	=== Architecture overview ===		=== Architecture overview ===
	~~=== Instruction set overview ===~~
	=== C Runtime overview ===		=== C Runtime overview ===

Capsang at 01:14, 31 January 2012

2012-01-31T01:14:06Z

← Older revision		Revision as of 01:14, 31 January 2012
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	In this code, the main function simply calls a specialized routine (called Kernel (-link-)), and passes in the 3 arrays that need to be processed parallely.		In this code, the main function simply calls a specialized routine (called Kernel (-link-)), and passes in the 3 arrays that need to be processed parallely.
	It also informs the CUDA runtime (-link-) to create 1000 threads, where each thread runs the same VecAdd routine, but on different data.		It also informs the CUDA runtime (-link-) to create 1000 threads, where each thread runs the same VecAdd routine, but on different data. As can be seen from the code, in the VecAdd routine, we are finding the thread index and acting only on that index of the input arrays. Hence each of the 1000 threads acts on a different location and performs the computation. This helps us achieve exponential performance improvements, which becomes evident when dealing with super-parallel applications such as those mentioned above.

	== Other well known Applications ==		== Other well known Applications ==

Capsang at 00:59, 31 January 2012

2012-01-31T00:59:49Z

@@ Line 60: / Line 60: @@
 </pre>
-This is typically done in high level programming languages such as C using the Thread(-link-) abstraction, where each thread runs simultaneously on a different processing unit.
+This is typically done in high level programming languages such as C using the Thread(-link-) abstraction, where each thread runs simultaneously on a different processing unit. Even though this solution is much faster, it is still limited to just two parallel executions.
 === CUDA solution ===
 == Other well known Applications ==

Capsang at 00:47, 31 January 2012

2012-01-31T00:47:29Z

@@ Line 37: / Line 37: @@
 </pre>
 == Solution ==
 === CUDA solution ===

Capsang at 00:29, 31 January 2012

2012-01-31T00:29:27Z

← Older revision		Revision as of 00:29, 31 January 2012
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	=== CUDA solution ===		=== CUDA solution ===

	== Other ~~parallelism techniques~~ ==		== Other well known Applications ==
	~~Task and Program~~ parallelism.		Password guessing
			3D rendering,etc
			http://www.infoworld.com/d/developer-world/gpu-computing-about-massive-data-parallelism-263

Capsang at 00:28, 31 January 2012

2012-01-31T00:28:33Z

← Older revision		Revision as of 00:28, 31 January 2012
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	== Solution ==		== Solution ==
	=== CUDA solution ===		=== CUDA solution ===

			== Other parallelism techniques ==
			Task and Program parallelism.

Capsang at 00:26, 31 January 2012

2012-01-31T00:26:55Z

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	}		}
	</pre>		</pre>

			Here we are executing the <code>for</code> loop, once for each array index. On a sequential processor (Single core processor),the instructions similar to the following are executed for each run of the <code>for</code> loop.
			<pre>
			Fetch i
			Fetch A[i] into Register EAX
			Fetch B[i] into Register EBX
			Add EBX to EAX
			Store EAX into Adress of C[i]
			</pre>


	== Solution ==		== Solution ==
	=== CUDA solution ===		=== CUDA solution ===