CSC 456 Spring 2012/10a AJ - Revision history

Alhamann: /* Fixed vs. Adaptive Sequential Prefetching */

2012-04-26T05:56:37Z

Fixed vs. Adaptive Sequential Prefetching

← Older revision		Revision as of 05:56, 26 April 2012
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	===Fixed vs. Adaptive Sequential Prefetching===		===Fixed vs. Adaptive Sequential Prefetching===
	Fixed sequential prefetching refers to prefetching that occurs at a constant rate over time. Because the amount of prefetching remains constant throughout execution, fixed sequential is the simplest method of prefetching to implement. When block n is read, a fixed number of consecutive blocks (K), are prefetched if they are not already in the cache regardless of a read miss or read hit. Finding the best value for K remains tricky, however. The K value must be large enough to lower cold miss rates while at the same time small enough ~~in order~~ to not ~~load~~ the cache ~~with useless data and~~ unnecessary traffic.		Fixed sequential prefetching refers to prefetching that occurs at a constant rate over time. Because the amount of prefetching remains constant throughout execution, fixed sequential is the simplest method of prefetching to implement. When block n is read, a fixed number of consecutive blocks (K), are prefetched if they are not already in the cache regardless of a read miss or read hit. Finding the best value for K remains tricky, however. The K value must be large enough to lower cold miss rates while at the same time small enough to ensure that useless data is not loaded into the cache causing unnecessary traffic.

	Adaptive sequential prefetching, on the other hand, changes the rate of prefetching allowed over time. The prefetching rate is increased/decreased based on the ~~count~~ of successful prefetches.		Adaptive sequential prefetching, on the other hand, changes the rate of prefetching allowed over time. The prefetching rate is increased or decreased based on the number of past successful prefetches (prefetched blocks that were actually used). The rate of prefetching is increased when the ratio between useful prefetches and total prefetches becomes greater than a particular threshold. The rate is also consequently decreased the the same ratio fall below a second threshold. While both methods improve efficiency, adaptive sequential prefetching is the most efficient but also the most costly. (Dahlgren)

	The rate is ~~therefore dependent on workload~~ and ~~application (~~a ~~start-up process will have~~ a ~~higher rate of cold misses)~~. While both methods improve efficiency, adaptive sequential prefetching is the most efficient but also the most costly. (Dahlgren)

	===Exclusive Mode-Prefetching===		===Exclusive Mode-Prefetching===

Jmmohund2: /* References */

2012-04-25T01:24:47Z

References

← Older revision		Revision as of 01:24, 25 April 2012
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	*Amir Kamil Jimmy Su, and Katherine Yelick, "Making sequential consistency practical in Titanium," Supercomputing, SC-2005		*Amir Kamil Jimmy Su, and Katherine Yelick, "Making sequential consistency practical in Titanium," Supercomputing, SC-2005
			*http://download.intel.com/education/highered/multicore/Lecture27.pdf

Jmmohund2: /* Exclusive Mode-Prefetching */

2012-04-25T01:22:54Z

Exclusive Mode-Prefetching

← Older revision		Revision as of 01:22, 25 April 2012
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	===Exclusive Mode-Prefetching===		===Exclusive Mode-Prefetching===
	Exclusive-mode prefetching helps to reduce both the miss latencies and the message traffic associated with writes. Unlike read misses, which directly stall the processor for their entire duration. Write misses affect performance[[File:exclusive_prefetch.jpg\|200px\|thumb\|right\| exclusive prefetch]] more indirectly, since writes can be buffered. A processor stalls while waiting for writes to complete in two situations: (i) when executing a write instruction if the write buffer is full, and (ii) during a read miss if previous writes must complete before the read miss can proceed. The impact of the former effect can be reduced through larger write buffers. In summary, exclusive-mode prefetching can provide significant performance benefits in architectures that have not already eliminated write stall times through aggressive implementations of weaker consistency models with lockup-free caches. Even if write stall times cannot be further reduced, exclusive-mode prefetching can improve performance somewhat by reducing the traffic associated with cache coherency.		Exclusive-mode prefetching helps to reduce both the miss latencies and the message traffic associated with writes. Unlike read misses, which directly stall the processor for their entire duration. Write misses affect performance[[File:exclusive_prefetch.jpg\|200px\|thumb\|right\| exclusive prefetch]] more indirectly, since writes can be buffered. A processor stalls while waiting for writes to complete in two situations: (i) when executing a write instruction if the write buffer is full, and (ii) during a read miss if previous writes must complete before the read miss can proceed. The impact of the former effect can be reduced through larger write buffers. In summary, exclusive-mode prefetching can provide significant performance benefits in architectures that have not already eliminated write stall times through aggressive implementations of weaker consistency models with lockup-free caches. Even if write stall times cannot be further reduced, exclusive-mode prefetching can improve performance somewhat by reducing the traffic associated with cache coherency. The main effect of exclusive mode prefetching is that the item that is prefetched, is done so as though its exclusive to that cache.

	==Where they stand now==		==Where they stand now==

Alhamann: /* Fixed vs. Adaptive Sequential Prefetching */

2012-04-23T18:06:18Z

Fixed vs. Adaptive Sequential Prefetching

← Older revision		Revision as of 18:06, 23 April 2012
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	===Fixed vs. Adaptive Sequential Prefetching===		===Fixed vs. Adaptive Sequential Prefetching===
	Fixed sequential prefetching refers to prefetching that occurs at a constant rate over time. Adaptive sequential prefetching, on the other hand, changes the rate of prefetching allowed over time. The prefetching rate is increased/decreased based on the count of successful prefetches. The rate is therefore dependent on workload and application (a start-up process will have a higher rate of cold misses). While both methods improve efficiency, adaptive sequential prefetching is the most efficient but also the most costly. (Dahlgren)		Fixed sequential prefetching refers to prefetching that occurs at a constant rate over time. Because the amount of prefetching remains constant throughout execution, fixed sequential is the simplest method of prefetching to implement. When block n is read, a fixed number of consecutive blocks (K), are prefetched if they are not already in the cache regardless of a read miss or read hit. Finding the best value for K remains tricky, however. The K value must be large enough to lower cold miss rates while at the same time small enough in order to not load the cache with useless data and unnecessary traffic.

			Adaptive sequential prefetching, on the other hand, changes the rate of prefetching allowed over time. The prefetching rate is increased/decreased based on the count of successful prefetches.

			The rate is therefore dependent on workload and application (a start-up process will have a higher rate of cold misses). While both methods improve efficiency, adaptive sequential prefetching is the most efficient but also the most costly. (Dahlgren)

	===Exclusive Mode-Prefetching===		===Exclusive Mode-Prefetching===

Jmmohund2: /* Intro */

2012-04-23T18:03:12Z

Intro

← Older revision		Revision as of 18:03, 23 April 2012
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	=Prefetching and Consistency Models=		=Prefetching and Consistency Models=
	==Intro==		==Intro==
	While memory consistency models ~~insure~~ instructions are executed in correct order, these models can hinder efficiency. Since consistency models dictate order of execution, prefetching allows operations to complete quicker once their turn comes by bringing the necessary data closer into the cache before it is needed. Prefetching is a hardware optimization technique in which the processor automatically prefetches ownership for any write operations that are delayed. These delays are due to the program order requirement. Using prefetching as well as sequential consistency creates delayed writes that become partially overlapped with the operations preceding them in program order. This technique is only applicable to cache-based systems that use an invalidation-based protocol. This technique is suitable for statically scheduled processors.		While memory consistency models ensure instructions are executed in correct order, these models can hinder efficiency. Since consistency models dictate order of execution, prefetching allows operations to complete quicker once their turn comes by bringing the necessary data closer into the cache before it is needed. Prefetching is a hardware optimization technique in which the processor automatically prefetches ownership for any write operations that are delayed. These delays are due to the program order requirement. Using prefetching as well as sequential consistency creates delayed writes that become partially overlapped with the operations preceding them in program order. This technique is only applicable to cache-based systems that use an invalidation-based protocol. This technique is suitable for statically scheduled processors.

	==Methods==		==Methods==

Jmmohund2: /* Exclusive Mode-Prefetching */

2012-04-23T18:00:05Z

Exclusive Mode-Prefetching

← Older revision		Revision as of 18:00, 23 April 2012
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	===Exclusive Mode-Prefetching===		===Exclusive Mode-Prefetching===
	Exclusive-mode prefetching helps to reduce both the miss latencies and the message traffic associated with writes. Unlike read misses, which directly stall the processor for their entire duration~~, write~~ misses affect performance[[File:exclusive_prefetch.jpg\|200px\|thumb\|right\| exclusive prefetch]] more indirectly, since writes can be buffered. A processor stalls while waiting for writes to complete in two situations: (i) when executing a write instruction if the write buffer is full, and (ii) during a read miss if previous writes must complete before the read miss can proceed. The impact of the former effect can be reduced through larger write buffers. In summary, exclusive-mode prefetching can provide significant performance benefits in architectures that have not already eliminated write stall times through aggressive implementations of weaker consistency models with lockup-free caches. Even if write stall times cannot be further reduced, exclusive-mode prefetching can improve performance somewhat by reducing the traffic associated with cache coherency.		Exclusive-mode prefetching helps to reduce both the miss latencies and the message traffic associated with writes. Unlike read misses, which directly stall the processor for their entire duration. Write misses affect performance[[File:exclusive_prefetch.jpg\|200px\|thumb\|right\| exclusive prefetch]] more indirectly, since writes can be buffered. A processor stalls while waiting for writes to complete in two situations: (i) when executing a write instruction if the write buffer is full, and (ii) during a read miss if previous writes must complete before the read miss can proceed. The impact of the former effect can be reduced through larger write buffers. In summary, exclusive-mode prefetching can provide significant performance benefits in architectures that have not already eliminated write stall times through aggressive implementations of weaker consistency models with lockup-free caches. Even if write stall times cannot be further reduced, exclusive-mode prefetching can improve performance somewhat by reducing the traffic associated with cache coherency.

	==Where they stand now==		==Where they stand now==

Jmmohund2: /* Intro */

2012-04-23T17:50:53Z

Intro

← Older revision		Revision as of 17:50, 23 April 2012
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	=Prefetching and Consistency Models=		=Prefetching and Consistency Models=
	==Intro==		==Intro==
	While memory consistency models insure instructions are executed in correct order, these models can hinder efficiency. Since consistency models dictate order of execution, prefetching allows operations to complete quicker once their turn comes by bringing the ~~necessarily~~ data closer into the cache before it is needed. Prefetching is a hardware optimization technique in which the processor automatically prefetches ownership for any write operations that are delayed. These delays are due to the program order requirement. Using prefetching as well as sequential consistency creates delayed writes that become partially overlapped with the operations preceding them in program order. This technique is only applicable to cache-based systems that use an invalidation-based protocol. This technique is suitable for statically scheduled processors.		While memory consistency models insure instructions are executed in correct order, these models can hinder efficiency. Since consistency models dictate order of execution, prefetching allows operations to complete quicker once their turn comes by bringing the necessary data closer into the cache before it is needed. Prefetching is a hardware optimization technique in which the processor automatically prefetches ownership for any write operations that are delayed. These delays are due to the program order requirement. Using prefetching as well as sequential consistency creates delayed writes that become partially overlapped with the operations preceding them in program order. This technique is only applicable to cache-based systems that use an invalidation-based protocol. This technique is suitable for statically scheduled processors.

	==Methods==		==Methods==

Jmmohund2: /* Intro */

2012-04-23T17:50:11Z

Intro

← Older revision		Revision as of 17:50, 23 April 2012
Line 1:		Line 1:
	=Prefetching and Consistency Models=		=Prefetching and Consistency Models=
	==Intro==		==Intro==
	While memory consistency models insure instructions are executed in correct order, these models can hinder efficiency. Since consistency models dictate order of execution, prefetching allows operations to complete quicker once their turn comes by bringing the necessarily data closer into the cache before it is needed. Prefetching is a hardware optimization technique in which the processor automatically prefetches ownership for any write operations that are delayed. These delays are due to the program order requirement ~~(e.g., by issuing prefetch-exclusive requests for any writes delayed in the write buffer)~~. Using prefetching as well as sequential consistency creates delayed writes that become partially overlapped with the operations preceding them in program order. This technique is only applicable to cache-based systems that use an invalidation-based protocol. This technique is suitable for statically scheduled processors.		While memory consistency models insure instructions are executed in correct order, these models can hinder efficiency. Since consistency models dictate order of execution, prefetching allows operations to complete quicker once their turn comes by bringing the necessarily data closer into the cache before it is needed. Prefetching is a hardware optimization technique in which the processor automatically prefetches ownership for any write operations that are delayed. These delays are due to the program order requirement. Using prefetching as well as sequential consistency creates delayed writes that become partially overlapped with the operations preceding them in program order. This technique is only applicable to cache-based systems that use an invalidation-based protocol. This technique is suitable for statically scheduled processors.

	==Methods==		==Methods==

Alhamann: /* Fixed vs. Adaptive Sequential Prefetching */

2012-04-23T17:45:39Z

Fixed vs. Adaptive Sequential Prefetching

← Older revision		Revision as of 17:45, 23 April 2012
Line 6:		Line 6:

	===Fixed vs. Adaptive Sequential Prefetching===		===Fixed vs. Adaptive Sequential Prefetching===
	Fixed sequential prefetching refers to prefetching that occurs at a constant rate over time. Adaptive sequential prefetching, on the other hand, changes the rate of prefetching allowed over time. The prefetching rate is increased/decreased based on the count of successful prefetches. The rate is therefore dependent on workload and application (a start-up process will have a higher rate of cold misses). While both methods improve efficiency, adaptive sequential prefetching is the most efficient but also the most costly.		Fixed sequential prefetching refers to prefetching that occurs at a constant rate over time. Adaptive sequential prefetching, on the other hand, changes the rate of prefetching allowed over time. The prefetching rate is increased/decreased based on the count of successful prefetches. The rate is therefore dependent on workload and application (a start-up process will have a higher rate of cold misses). While both methods improve efficiency, adaptive sequential prefetching is the most efficient but also the most costly. (Dahlgren)

	===Exclusive Mode-Prefetching===		===Exclusive Mode-Prefetching===

Jmmohund2: /* References */

2012-04-23T17:45:25Z

References

← Older revision		Revision as of 17:45, 23 April 2012
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	*http://expertiza.csc.ncsu.edu/wiki/index.php/CSC/ECE_506_Spring_2012/ch10_sj		*http://expertiza.csc.ncsu.edu/wiki/index.php/CSC/ECE_506_Spring_2012/ch10_sj
	*http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.126.3128&rep=rep1&type=pdf		*http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.126.3128&rep=rep1&type=pdf
			*http://www.cesr.ncsu.edu/solihin/Main.html

	*Kourosh Gharachorloo, Anoop Gupta, and John Hennessy of Stanford University, "Two techniques to enhance the performance of memory consistency models," International Conference on Parallel Processing, 1991		*Kourosh Gharachorloo, Anoop Gupta, and John Hennessy of Stanford University, "Two techniques to enhance the performance of memory consistency models," International Conference on Parallel Processing, 1991