CSC/ECE 506 Spring 21012/11a ht - Revision history

Stchen at 20:29, 13 April 2012

2012-04-13T20:29:58Z

← Older revision		Revision as of 20:29, 13 April 2012
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	=Introduction=		'''DSM Performance'''

			==Introduction==
	When dealing with a relatively small number of processors (8-16), according to Solihin 320, using a bus based shared memory structure is fine. Unfortunately, when you need to provide a shared memory structure for processors much greater than that, you will need a different set of organization. This new organization is needed due to the physical limitations of the bus. There are two ways you can create such a system. These include [http://en.wikipedia.org/wiki/Distributed_shared_memory Distributed Shared Memory] (DSM) or [http://en.wikipedia.org/wiki/Non-Uniform_Memory_Access Non-Uniform Memory Access] (NUMA). The benefits of having a DSM and NUMA is that we can now scale to a larger amount of processors. The disadvantage is that scaling in such a way may not be the most cost-effective solution, Solihin 320. For the remainder of this section, we will be discussing the performance of DSM's.		When dealing with a relatively small number of processors (8-16), according to Solihin 320, using a bus based shared memory structure is fine. Unfortunately, when you need to provide a shared memory structure for processors much greater than that, you will need a different set of organization. This new organization is needed due to the physical limitations of the bus. There are two ways you can create such a system. These include [http://en.wikipedia.org/wiki/Distributed_shared_memory Distributed Shared Memory] (DSM) or [http://en.wikipedia.org/wiki/Non-Uniform_Memory_Access Non-Uniform Memory Access] (NUMA). The benefits of having a DSM and NUMA is that we can now scale to a larger amount of processors. The disadvantage is that scaling in such a way may not be the most cost-effective solution, Solihin 320. For the remainder of this section, we will be discussing the performance of DSM's.

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	From the table, we can see that there is three ways to scale a multiprocessor system. The first being a single bus system. This is the least scalable due to the limitations of the bus wire itself. As you add processors you will decrease the bus speed due to having to increase the wire length. Also, you run into an issue of overwhelming the bus due to the amount of traffic. The second way is to use a point-to-point bus system. This allows for the speed of the bus to remain relatively fast, but since the traffic will also scale with the number of processors, there will be a limitation due to overwhelming the bus system with traffic. Lastly, the most scalable system to date is using a directory system. This allows for the bus to remain fast due to the short wires, and the bus traffic to remain low since the directory holds information on cache locations.		From the table, we can see that there is three ways to scale a multiprocessor system. The first being a single bus system. This is the least scalable due to the limitations of the bus wire itself. As you add processors you will decrease the bus speed due to having to increase the wire length. Also, you run into an issue of overwhelming the bus due to the amount of traffic. The second way is to use a point-to-point bus system. This allows for the speed of the bus to remain relatively fast, but since the traffic will also scale with the number of processors, there will be a limitation due to overwhelming the bus system with traffic. Lastly, the most scalable system to date is using a directory system. This allows for the bus to remain fast due to the short wires, and the bus traffic to remain low since the directory holds information on cache locations.

	=Distributed Shared Memory=		==Distributed Shared Memory==


	For dis		For dis

Stchen at 20:29, 13 April 2012

2012-04-13T20:29:01Z

← Older revision		Revision as of 20:29, 13 April 2012
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	~~<<toc/>>~~
	=Introduction=		=Introduction=


	When dealing with a relatively small number of processors (8-16), according to Solihin 320, using a bus based shared memory structure is fine. Unfortunately, when you need to provide a shared memory structure for processors much greater than that, you will need a different set of organization. This new organization is needed due to the physical limitations of the bus. There are two ways you can create such a system. These include [http://en.wikipedia.org/wiki/Distributed_shared_memory Distributed Shared Memory] (DSM) or [http://en.wikipedia.org/wiki/Non-Uniform_Memory_Access Non-Uniform Memory Access] (NUMA). The benefits of having a DSM and NUMA is that we can now scale to a larger amount of processors. The disadvantage is that scaling in such a way may not be the most cost-effective solution, Solihin 320. For the remainder of this section, we will be discussing the performance of DSM's.		When dealing with a relatively small number of processors (8-16), according to Solihin 320, using a bus based shared memory structure is fine. Unfortunately, when you need to provide a shared memory structure for processors much greater than that, you will need a different set of organization. This new organization is needed due to the physical limitations of the bus. There are two ways you can create such a system. These include [http://en.wikipedia.org/wiki/Distributed_shared_memory Distributed Shared Memory] (DSM) or [http://en.wikipedia.org/wiki/Non-Uniform_Memory_Access Non-Uniform Memory Access] (NUMA). The benefits of having a DSM and NUMA is that we can now scale to a larger amount of processors. The disadvantage is that scaling in such a way may not be the most cost-effective solution, Solihin 320. For the remainder of this section, we will be discussing the performance of DSM's.

Stchen at 20:28, 13 April 2012

2012-04-13T20:28:41Z

← Older revision		Revision as of 20:28, 13 April 2012
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	<<toc>>		<<toc/>>
	=Introduction=		=Introduction=

Stchen at 20:28, 13 April 2012

2012-04-13T20:28:01Z

← Older revision		Revision as of 20:28, 13 April 2012
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			<<toc>>
	=Introduction=		=Introduction=

Stchen: /* Introduction */

2012-04-13T20:26:52Z

Introduction

← Older revision		Revision as of 20:26, 13 April 2012
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	= Introduction =		=Introduction=

Stchen: /* Introduction */

2012-04-13T20:26:25Z

Introduction

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	=Introduction=		= Introduction =

Stchen at 20:26, 13 April 2012

2012-04-13T20:26:03Z

← Older revision		Revision as of 20:26, 13 April 2012
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	~~===DSM PERFORMANCE===~~


	=Introduction=		=Introduction=

Stchen: /* Introduction */

2012-04-13T20:25:49Z

Introduction

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	==Introduction==		=Introduction=

Stchen: /* Introduction */

2012-04-13T20:24:00Z

Introduction

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	<center>[[Image:ProtocolVSinterconnection.png\|400px\| Multiple Caches of Shared Resource]]</center>		<center>[[Image:ProtocolVSinterconnection.png\|400px\| Multiple Caches of Shared Resource]]</center>
	<center> '''Figure 1. Ways to Scale Multiprocessors''' </center>		<center> '''Figure 1. Ways to Scale Multiprocessors''' </center>


			From the table, we can see that there is three ways to scale a multiprocessor system. The first being a single bus system. This is the least scalable due to the limitations of the bus wire itself. As you add processors you will decrease the bus speed due to having to increase the wire length. Also, you run into an issue of overwhelming the bus due to the amount of traffic. The second way is to use a point-to-point bus system. This allows for the speed of the bus to remain relatively fast, but since the traffic will also scale with the number of processors, there will be a limitation due to overwhelming the bus system with traffic. Lastly, the most scalable system to date is using a directory system. This allows for the bus to remain fast due to the short wires, and the bus traffic to remain low since the directory holds information on cache locations.

	=Distributed Shared Memory=		=Distributed Shared Memory=

Stchen: /* Introduction */

2012-04-13T20:20:19Z

Introduction

← Older revision		Revision as of 20:20, 13 April 2012
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	<center>[[Image:ProtocolVSinterconnection.png\|400px\| Multiple Caches of Shared Resource]]</center>		<center>[[Image:ProtocolVSinterconnection.png\|400px\| Multiple Caches of Shared Resource]]</center>
	<center> '''Figure 1. ~~Multiple Caches of Shared Resource~~''' </center>		<center> '''Figure 1. Ways to Scale Multiprocessors''' </center>

	=Distributed Shared Memory=		=Distributed Shared Memory=