CSC/ECE 506 Spring 2014/10c qq - Revision history

Jshen6: /* References */

2014-04-12T01:16:18Z

References

← Older revision		Revision as of 01:16, 12 April 2014
Line 507:		Line 507:
	# [http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.52.9935&rep=rep1&type=pdf Performance Evaluation of Memory Consistency Models for Shared-Memory Multiprocessors]<br />		# [http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.52.9935&rep=rep1&type=pdf Performance Evaluation of Memory Consistency Models for Shared-Memory Multiprocessors]<br />
	# [http://ce.et.tudelft.nl/publicationfiles/915_463_bos.pdf Performance Benefits of Relaxed Memory Consistency for Process Network Applications]<br />		# [http://ce.et.tudelft.nl/publicationfiles/915_463_bos.pdf Performance Benefits of Relaxed Memory Consistency for Process Network Applications]<br />
	# [http://www.~~cesr~~.~~ncsu~~.~~edu~~/~~solihin~~/~~Main.html~~ Fundamentals of Parallel Computer Architecture by Yan Solihin]<br />		# [http://www.angusrobertson.com.au/book/fundamentals-of-parallel-computer-architecture-multichip-and-multicore-systems/7207154/ Fundamentals of Parallel Computer Architecture by Yan Solihin]<br />
	# [http://www.cs.wisc.edu/multifacet/papers/computer98_sccase.pdf Multiprocessors Should Support Simple Memory-Consistency Models]<br />		# [http://www.cs.wisc.edu/multifacet/papers/computer98_sccase.pdf Multiprocessors Should Support Simple Memory-Consistency Models]<br />
	# [http://infolab.stanford.edu/pub/cstr/reports/csl/tr/95/685/CSL-TR-95-685.pdf Technical Report by Kourosh Gharachorloo on Memory Consistency Models for shared-memory Multiprocessors]<br />		# [http://infolab.stanford.edu/pub/cstr/reports/csl/tr/95/685/CSL-TR-95-685.pdf Technical Report by Kourosh Gharachorloo on Memory Consistency Models for shared-memory Multiprocessors]<br />

Jshen6 at 01:10, 12 April 2014

2014-04-12T01:10:00Z

← Older revision		Revision as of 01:10, 12 April 2014
Line 1:		Line 1:
			'''[http://wiki.expertiza.ncsu.edu/index.php/CSC/ECE_506_Spring_2013/10c_ks Previous work]'''


	='''Memory Consistency models'''=		='''Memory Consistency models'''=
	== '''Introduction''' ==		== '''Introduction''' ==

Jshen6: /* Relaxed Consistency Models */

2014-04-10T02:38:41Z

Relaxed Consistency Models

← Older revision		Revision as of 02:38, 10 April 2014
Line 75:		Line 75:
	Read - Write<br>		Read - Write<br>
	Write -Read<br>		Write -Read<br>
	Write - Write<br></div>		Write - Write<br>
			</div>

	'''2. Synchronizing vs. Non-Synchronizing:''' A synchronizing model divides shared memory		'''2. Synchronizing vs. Non-Synchronizing:''' A synchronizing model divides shared memory

Jshen6: /* Introduction to Sequential Consistency Model */

2014-04-10T02:37:53Z

Introduction to Sequential Consistency Model

← Older revision		Revision as of 02:37, 10 April 2014
Line 16:		Line 16:
	[[Image:SeqC.jpg]] <br />		[[Image:SeqC.jpg]] <br />
	The figure above shows the basic representation for sequential consistency. This conceptual system for SC consists of n processors sharing a single logical memory. Though the figure does not show caches, an SC implementation may still cache data as long as the memory system appears as a single copy memory(i.e the writes should appear atomic). As SC requires program order to be maintained among all operation types, the pictorial representation of the program order shows all combinations of reads and writes, the line between them telling that the operations are required to complete in program order.		The figure above shows the basic representation for sequential consistency. This conceptual system for SC consists of n processors sharing a single logical memory. Though the figure does not show caches, an SC implementation may still cache data as long as the memory system appears as a single copy memory(i.e the writes should appear atomic). As SC requires program order to be maintained among all operation types, the pictorial representation of the program order shows all combinations of reads and writes, the line between them telling that the operations are required to complete in program order.
	This model ensures that the reads of a variable, will return the new values written to it by a processor. Sequential consistency provides a simple, intuitive programming model. Because of its strict consistency requirements, sequential consistency, many of the architecture and compiler optimizations used in uniprocessors are not safely applicable to sequentially consistent multiprocessors.[ For more details on sequential consistency model and its advantages/disadvantages refer to textbook by Yan Solihin , page 284 through 292]. For this reason, many '''Relaxed consistency models''' have been proposed, most of which		This model ensures that the reads of a variable, will return the new values written to it by a processor. Sequential consistency provides a simple, intuitive programming model. Because of its strict consistency requirements, sequential consistency, many of the architecture and compiler optimizations used in uniprocessors are not safely applicable to sequentially consistent multiprocessors.[ For more details on sequential consistency model and its advantages/disadvantages refer to '''[http://www.angusrobertson.com.au/book/fundamentals-of-parallel-computer-architecture-multichip-and-multicore-systems/7207154/ Fundamentals of Parallel Computer Architecture]''' textbook by Yan Solihin, page 284 through 292]. For this reason, many '''Relaxed consistency models''' have been proposed, most of which
	are supported by commercial architectures.		are supported by commercial architectures.

Pwang8: /* Quiz */

2014-04-10T02:37:05Z

Quiz

← Older revision		Revision as of 02:37, 10 April 2014
Line 555:		Line 555:

	3. Which of the following is/are the difference between Entry consistency and release consistency?		3. Which of the following is/are the difference between Entry consistency and release consistency?
	~~A. Entry consistency distinguishes the difference between exclusive synchronization and non-exclusive synchronization while release consistency cannot.~~
	~~B. Entry consistency model will consume less time in the critical section for the same piece of code compare to release consistency model.~~
	~~C. The performance of entry consistency is always better than release consistency.~~

	Answer: AB		A. Entry consistency distinguishes the difference between exclusive synchronization and non-exclusive synchronization while release consistency cannot.<br/>
			B. Entry consistency model will consume less time in the critical section for the same piece of code compare to release consistency model.<br/>
			C. The performance of entry consistency is always better than release consistency.<br/>
			<br/>
			Answer: AB<br/>

	4. Which types of the following relax orders that IBM 370 model apply? (Choose one or more)		4. Which types of the following relax orders that IBM 370 model apply? (Choose one or more)
	~~A. Read to Write~~
	~~B. Write to Read~~
	~~C. Write to Write~~

	Answer: B		A. Read to Write<br/>
			B. Write to Read<br/>
			C. Write to Write<br/>
			<br/>
			Answer: B<br/>

	5. What are shortcomings of relaxed consistency models?		5. What are shortcomings of relaxed consistency models?
	~~A. Relax consistency models will increase programming complexity.~~
	~~B. Compatibility among different models is a problem using relaxed consistency models.~~
	~~C. The additional semantics of relaxed consistency models would be quite complicate.~~

	Answer: ABC		A. Relax consistency models will increase programming complexity.<br/>
			B. Compatibility among different models is a problem using relaxed consistency models.<br/>
			C. The additional semantics of relaxed consistency models would be quite complicate. <br/>
			<br/>
			Answer: ABC<br/>

	6. Which of the following is/are true about lazy and eager release consistency models?		6. Which of the following is/are true about lazy and eager release consistency models?
	~~A. For the lazy protocol, write-through policy is necessary in order to ensure correctness.~~
	~~B. Lazy release consistency model will always outperform than eager release consistency model.~~
	~~C. Eager release consistency model can greatly reduce the number of messages and data transfers among processors which exhibit false sharing and make extensive use of locks.~~

	Answer: AB		A. For the lazy protocol, write-through policy is necessary in order to ensure correctness.<br/>
			B. Lazy release consistency model will always outperform than eager release consistency model.<br/>
			C. Eager release consistency model can greatly reduce the number of messages and data transfers among processors which exhibit false sharing and make extensive use of locks.<br/>
			<br/>
			Answer: AB<br/>

	7. Which of these following models belong to deterministic relaxed consistency models?		7. Which of these following models belong to deterministic relaxed consistency models?
	~~A. Weak Order~~
	~~B. DMP-TSO~~
	~~C. DMP-HB~~
	~~D. Processor Order~~

	Answer: BC		A. Weak Order<br/>
			B. DMP-TSO<br/>
			C. DMP-HB<br/>
			D. Processor Order<br/>
			<br/>
			Answer: BC<br/>

	8. Which of the followings are NOT the disadvantages of using relaxed consistency models?		8. Which of the followings are NOT the disadvantages of using relaxed consistency models?
	~~A. Improve system performance~~
	~~B. Increase programming complexity~~
	~~C. Have no influence in system compatibility~~
	~~D. Correctness of program execution would rely more on programmer’s work~~

	Answer: AC		A. Improve system performance<br/>
			B. Increase programming complexity<br/>
			C. Have no influence in system compatibility<br/>
			D. Correctness of program execution would rely more on programmer’s work<br/>
			<br/>
			Answer: AC<br/>

	9. Which of the followings are hardware-based optimization methods?		9. Which of the followings are hardware-based optimization methods?
	~~A. Speculative Reads~~
	~~B. Shasha and Snir's algorithm~~
	~~C. Prefetching~~
	~~D. Relaxed consistency models~~

	Answer: AC		A. Speculative Reads<br/>
			B. Shasha and Snir's algorithm<br/>
			C. Prefetching<br/>
			D. Relaxed consistency models<br/>
			<br/>
			Answer: AC<br/>

	10. Which of the following models belong to Read-to-Read and Read-to-Write relaxed models?		10. Which of the following models belong to Read-to-Read and Read-to-Write relaxed models?
	~~A. Weak Ordering~~
	~~B. Release Ordering~~
	~~C. DEC Alpha~~
	~~D. Total Store Ordering~~

	Answer: ABC		A. Weak Ordering<br/>
			B. Release Ordering<br/>
			C. DEC Alpha<br/>
			D. Total Store Ordering<br/>
			<br/>
			Answer: ABC<br/>

Pwang8: /* Quiz */

2014-04-10T02:34:24Z

Quiz

← Older revision		Revision as of 02:34, 10 April 2014
Line 542:		Line 542:
	<br/>		<br/>
	Answer: ABCD<br/>		Answer: ABCD<br/>

	2. For the execution sequence above, which of the following read values in P3 are possible under causal consistency?		2. For the execution sequence above, which of the following read values in P3 are possible under causal consistency?

Pwang8: /* Quiz */

2014-04-10T02:34:09Z

Quiz

← Older revision		Revision as of 02:34, 10 April 2014
Line 532:		Line 532:
	='''Quiz'''=		='''Quiz'''=

	# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?		1. For the execution sequence above, which of the following read values for x and y are possible under processor consistency?

	<center>[[File:Quiz1.jpg]]</center>		<center>[[File:Quiz1.jpg]]</center>
	~~A. (0, 3)~~

			A. (0, 3)<br/>
	B. (1, 1)<br/>		B. (1, 1)<br/>
	C. (2, 1)</ br>		C. (2, 1)<br/>
	D. (0, 1)</ br>		D. (0, 1)<br/>
	Answer: ABCD</ br>		<br/>
	# For the execution sequence above, which of the following read values in P3 are possible under causal consistency?		Answer: ABCD<br/>
			2. For the execution sequence above, which of the following read values in P3 are possible under causal consistency?

	<center>[[File:Quiz2.jpg]]</center>		<center>[[File:Quiz2.jpg]]</center>

	A. (0, 3)		A. (0, 3)<br/>
	B. (3, 0)		B. (3, 0)<br/>
	C. (2, 3)		C. (2, 3)<br/>
	D. (4, 2)		D. (4, 2)<br/>
			<br/>
	Answer: ABC		Answer: ABC<br/>

	3. Which of the following is/are the difference between Entry consistency and release consistency?		3. Which of the following is/are the difference between Entry consistency and release consistency?

Pwang8: /* Quiz */

2014-04-10T02:32:50Z

Quiz

← Older revision		Revision as of 02:32, 10 April 2014
Line 534:		Line 534:
	# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?		# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?
	<center>[[File:Quiz1.jpg]]</center>		<center>[[File:Quiz1.jpg]]</center>
	A. (0, 3)~~</br>~~		A. (0, 3)
	B. (1, 1)</ br>
			B. (1, 1)<br/>
	C. (2, 1)</ br>		C. (2, 1)</ br>
	D. (0, 1)</ br>		D. (0, 1)</ br>

Pwang8: /* Quiz */

2014-04-10T02:32:22Z

Quiz

← Older revision		Revision as of 02:32, 10 April 2014
Line 534:		Line 534:
	# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?		# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?
	<center>[[File:Quiz1.jpg]]</center>		<center>[[File:Quiz1.jpg]]</center>
	A. (0, 3)</ br>		A. (0, 3)</br>
	B. (1, 1)</ br>		B. (1, 1)</ br>
	C. (2, 1)</ br>		C. (2, 1)</ br>

Pwang8: /* Quiz */

2014-04-10T02:32:07Z

Quiz

← Older revision		Revision as of 02:32, 10 April 2014
Line 534:		Line 534:
	# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?		# For the execution sequence above, which of the following read values for x and y are possible under processor consistency?
	<center>[[File:Quiz1.jpg]]</center>		<center>[[File:Quiz1.jpg]]</center>
	A(0, 3)		A. (0, 3)</ br>
	B(1, 1)		B. (1, 1)</ br>
	C(2, 1)		C. (2, 1)</ br>
	D(0, 1)		D. (0, 1)</ br>
	Answer: ABCD		Answer: ABCD</ br>
	# For the execution sequence above, which of the following read values in P3 are possible under causal consistency?		# For the execution sequence above, which of the following read values in P3 are possible under causal consistency?