CSC/ECE 506 Spring 2013/12b rc - Revision history

Rkclarke: Added descriptions for tree and fat tree topologies

2014-04-23T18:59:08Z

Added descriptions for tree and fat tree topologies

← Older revision		Revision as of 18:59, 23 April 2014
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	=== Tree ===		=== Tree ===
	~~<stub>~~		A tree interconnection network consists of a hierarchical structure of parent nodes connected to one or two child nodes, who in turn are the parent nodes for the next level of interconnection. Nodes without any children, forming the bottom of the tree, are commonly referred to as leaf nodes.

			One of the primary advantages of a tree interconnection network is its scalability. The cost of adding each node is only one new unique interconnection. This allows for rather large trees to be constructed economically. The diameter of the network is also 2*log(n) for a tree with n leaf nodes.

			Performance is one of the major downfalls of tree interconnection networks. The bisection width of the network is only 1, regardless of number of nodes. This exposes two problems: First, the root of the tree (the top node) acts as a bottleneck for network bandwidth, slowing communication from one side of the tree to the other. Second, the low bisection width means that only a single failed link can cripple the entire network. This leads to low reliability. In addition, there is no path diversity at all in a tree topology.

	=== Fat Tree ===		=== Fat Tree ===
	~~<stub>~~		In contrast to a classical tree, a fat tree sacrifices cost for increased bandwidth at the top of the tree and greater interconnection reliability. This is accomplished by adding additional links between nodes at higher levels of the tree, such that the total number of links is the same for every level.

			A fat tree is much more costly to implement, as each new node requires a new link for every level above it, but the result is far greater performance, as the bisection width is now n/2 for n leaf nodes. The degree, path diversity, and diameter are identical to a classical tree.

	=== 2-D Mesh ===		=== 2-D Mesh ===

Rkclarke: format topology headers for consistency

2014-04-23T17:56:09Z

format topology headers for consistency

← Older revision		Revision as of 17:56, 23 April 2014
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	<stub>		<stub>

	=== ~~Trees~~ ===		=== Tree ===
	<stub>		<stub>

	=== Fat ~~Trees~~ ===		=== Fat Tree ===
	<stub>		<stub>

Rkclarke: added headers for hypercube, tree, and fat tree topologies

2014-04-23T17:54:09Z

added headers for hypercube, tree, and fat tree topologies

← Older revision		Revision as of 17:54, 23 April 2014
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	There are many different topologies that could be introduced in this section. Some of the missing topologies include but are not limited to:		There are many different topologies that could be introduced in this section. Some of the missing topologies include but are not limited to:

	* Hypercube
	* Shuffle-exchange		* Shuffle-exchange
	* Torus		* Torus
	* Trees

	They are just cited here for completion, related information can be found at [http://www.cs.cf.ac.uk/Parallel/Year2/section5.html Interconnection Networks]		They are just cited here for completion, related information can be found at [http://www.cs.cf.ac.uk/Parallel/Year2/section5.html Interconnection Networks]

			=== Hypercube ===
			<stub>

			=== Trees ===
			<stub>

			=== Fat Trees ===
			<stub>

	=== 2-D Mesh ===		=== 2-D Mesh ===

Rkclarke: expanded terminology entry of NoC

2014-04-23T17:48:58Z

expanded terminology entry of NoC

← Older revision		Revision as of 17:48, 23 April 2014
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	* [http://en.wikipedia.org/wiki/MPSoC MPSoCs] (Multiprocessor systems-on-chip), referring to a SoC that uses multi-core technology.		* [http://en.wikipedia.org/wiki/MPSoC MPSoCs] (Multiprocessor systems-on-chip), referring to a SoC that uses multi-core technology.
	It is interesting to note that for the particular theme of this article, there are at least three different acronyms referring to the same term. These are new technologies and different researchers have adopted different nomenclature. The acronyms are:		It is interesting to note that for the particular theme of this article, there are at least three different acronyms referring to the same term. These are new technologies and different researchers have adopted different nomenclature. The acronyms are:
	* NoC (network-on-chip), ~~this is the most common term~~ and ~~also used in this article~~		* [http://en.wikipedia.org/wiki/Network_on_a_chip NoC] (network-on-chip), which refers to a lightweight system of network interconnects between processing nodes on a MPSoC. This includes typical netowrk components such as routing information and packet format protocols, only scaled down for efficient implementation on a chip interconnect.
	* OCIN (on-chip interconnection network)		* OCIN (on-chip interconnection network)
	* OCN (on-chip network)		* OCN (on-chip network)

Rkclarke: copy of old page, no modifications yet

2014-04-23T17:33:43Z

copy of old page, no modifications yet

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