CSC/ECE 506 Spring 2013/11b ll - Revision history

Dapatel2 at 12:30, 18 April 2013

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← Older revision		Revision as of 12:30, 18 April 2013
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	;Previous Versions		;Previous Versions
	:[http://wiki.expertiza.ncsu.edu/index.php/CSC/ECE_506_Spring_2011/ch11_DJ Wiki1 ]		:[http://wiki.expertiza.ncsu.edu/index.php/CSC/ECE_506_Spring_2011/ch11_DJ Wiki1 ]
	:[http://wiki.expertiza.ncsu.edu/index.php/~~CSC/ECE_506_Spring_2011/ch11_BB_EP~~ Wiki2 ]		:[http://wiki.expertiza.ncsu.edu/index.php/Scalable_Coherent_Interface Wiki2 ]

	== '''Supplemental to Chapter 11: SCI Cache Coherence''' ==		== '''Supplemental to Chapter 11: SCI Cache Coherence''' ==

Dapatel2: /* Cache States : Simplified */

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Cache States : Simplified

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	To further simplify this scenario, only the following operations are possible:		To further simplify this scenario, only the following operations are possible:

	# ~~Read(O~~/S) – a read of the data by either the processor attached to the cache ~~(S for Self)~~ or the other processor ~~(O)~~.		# BusRd/PrRd – a read of the data by either the processor attached to the cache or the other processor through Bus read.
	# ~~Write(O~~/S) – a write of the memory block by either the processor attached to the cache ~~(S)~~ or the other processor ~~(O)~~.		# BusWr/PrWr – a write of the memory block by either the processor attached to the cache or the other processor through Bus write.

	As mentioned in the [[#Coherence Race Conditions \| Race Conditions ]] section, in order for a processor to make a write, they have to be in the head of the list (or the Sh state in this scenario).		As mentioned in the [[#Coherence Race Conditions \| Race Conditions ]] section, in order for a processor to make a write, they have to be in the head of the list (or the Sh state in this scenario).
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	The following state diagram illustrates the transitions:		The following state diagram illustrates the transitions:

	[[Image:SCIInterface.jpg]]		[[Image:SCIInterface.jpg \| center]]

	Figure 1: Simplified cache state diagram from SCI		Figure 1: Simplified cache state diagram from SCI
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	Initially, the cache is in the "I" state and the directory is in the "U" state. If processor 1 (P1) makes a read, the processor's cache moves from state I to E and the directory moves from U to EM. The directory records that P1 is the head of the directory list. At this point, processor 2 (P2) is in state I. If P2 makes a read, the directory is in state EM, so the directory notifies P1 that P2 is making a read, P1 transitions from E to St, and sends the data to P2. P2 transitions from I to Sh, and creates a pointer to P1 to note that P1 is the next memory on the directory list. The directory transitions from EM to S and the directory updates its pointer from P1 to P2 to note that P2 is now the head of the directory cache list.		Initially, the cache is in the "I" state and the directory is in the "U" state. If processor 1 (P1) makes a read, the processor's cache moves from state I to E and the directory moves from U to EM. The directory records that P1 is the head of the directory list. At this point, processor 2 (P2) is in state I. If P2 makes a read, the directory is in state EM, so the directory notifies P1 that P2 is making a read, P1 transitions from E to St, and sends the data to P2. P2 transitions from I to Sh, and creates a pointer to P1 to note that P1 is the next memory on the directory list. The directory transitions from EM to S and the directory updates its pointer from P1 to P2 to note that P2 is now the head of the directory cache list.

	As you can see from the diagram, a ~~Write(S)~~ can only occur when a processor is in the "Sh" state. In the actual SCI protocol, a write can occur when the cache is in the HEAD state combined with CLEAN/FRESH/DIRTY or when the cache is in the ONLY state. In this simplified scenario, these states are combined into one, the Sh state.		As you can see from the diagram, a PrWr can only occur when a processor is in the "Sh" state. In the actual SCI protocol, a write can occur when the cache is in the HEAD state combined with CLEAN/FRESH/DIRTY or when the cache is in the ONLY state. In this simplified scenario, these states are combined into one, the Sh state.

	== Summary ==		== Summary ==

Dapatel2: /* Cache States : Simplified */

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Cache States : Simplified

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	The following state diagram illustrates the transitions:		The following state diagram illustrates the transitions:

	[[Image:SCIInterface.~~png~~]]		[[Image:SCIInterface.jpg]]

	Figure 1: Simplified cache state diagram from SCI		Figure 1: Simplified cache state diagram from SCI

Dapatel2: /* Cache States : Simplified */

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Cache States : Simplified

← Older revision		Revision as of 12:12, 18 April 2013
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	The following state diagram illustrates the transitions:		The following state diagram illustrates the transitions:

	[[Image:~~SCIStatesC~~.png]]		[[Image:SCIInterface.png]]

	Figure 1: Simplified cache state diagram from SCI		Figure 1: Simplified cache state diagram from SCI

Dapatel2 at 01:44, 18 April 2013

2013-04-18T01:44:46Z

← Older revision		Revision as of 01:44, 18 April 2013
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			;Previous Versions
			:[http://wiki.expertiza.ncsu.edu/index.php/CSC/ECE_506_Spring_2011/ch11_DJ Wiki1 ]
			:[http://wiki.expertiza.ncsu.edu/index.php/CSC/ECE_506_Spring_2011/ch11_BB_EP Wiki2 ]

	== '''Supplemental to Chapter 11: SCI Cache Coherence''' ==		== '''Supplemental to Chapter 11: SCI Cache Coherence''' ==

Ljblackw: /* References */

2013-04-18T00:57:06Z

References

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	* Gustavson, David, and Qiang Li. "The Scalable Coherent Interface (SCI)." IEEE Communications Magazine 1996: 56. Web. 25 Apr 2011. <http://www.cs.utexas.edu/users/dburger/teaching/cs395t-s08/papers/9_sci.pdf>.		* Gustavson, David, and Qiang Li. "The Scalable Coherent Interface (SCI)." IEEE Communications Magazine 1996: 56. Web. 25 Apr 2011. <http://www.cs.utexas.edu/users/dburger/teaching/cs395t-s08/papers/9_sci.pdf>.
	* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.		* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.
	* "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366		* "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366 URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>
	URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>
	* [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>		* [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>

Ljblackw: /* References */

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References

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	* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.		* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.
	* "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366		* "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366
	URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>		URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>
	* [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>		* [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>

Ljblackw: /* References */

2013-04-18T00:56:36Z

References

← Older revision		Revision as of 00:56, 18 April 2013
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	* Gustavson, David, and Qiang Li. "The Scalable Coherent Interface (SCI)." IEEE Communications Magazine 1996: 56. Web. 25 Apr 2011. <http://www.cs.utexas.edu/users/dburger/teaching/cs395t-s08/papers/9_sci.pdf>.		* Gustavson, David, and Qiang Li. "The Scalable Coherent Interface (SCI)." IEEE Communications Magazine 1996: 56. Web. 25 Apr 2011. <http://www.cs.utexas.edu/users/dburger/teaching/cs395t-s08/papers/9_sci.pdf>.
	* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.		* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.
	~~<span id="1foot">[[#1body\|1.]]</span>~~ "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366		* "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366
	URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>		URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>
	~~<span id="2foot">[[#2body\|2.]]</span>~~ [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>		* [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>

Ljblackw: /* References */

2013-04-18T00:56:14Z

References

← Older revision		Revision as of 00:56, 18 April 2013
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	* Gustavson, David, and Qiang Li. "The Scalable Coherent Interface (SCI)." IEEE Communications Magazine 1996: 56. Web. 25 Apr 2011. <http://www.cs.utexas.edu/users/dburger/teaching/cs395t-s08/papers/9_sci.pdf>.		* Gustavson, David, and Qiang Li. "The Scalable Coherent Interface (SCI)." IEEE Communications Magazine 1996: 56. Web. 25 Apr 2011. <http://www.cs.utexas.edu/users/dburger/teaching/cs395t-s08/papers/9_sci.pdf>.
	* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.		* "1596-1992 - IEEE Standard for Scalable Coherent Interface (SCI)." IEEE Standards Association. N.p., n.d. Web. <http://standards.ieee.org/findstds/standard/1596-1992.html>.
			<span id="1foot">[[#1body\|1.]]</span> "IEEE Standard for Scalable Coherent Interface (SCI).," IEEE Std 1596-1992 , vol., no., pp.i, 1993. doi: 10.1109/IEEESTD.1993.120366
			URL: http://ieeexplore.ieee.org.proxied.lib.ncsu.edu/stamp/stamp.jsp?tp=&arnumber=347683&isnumber=8049 <br>
			<span id="2foot">[[#2body\|2.]]</span> [http://www.scizzl.com/HowSCIcohWorks.html How SCI Coherence Works] <br>

Ljblackw: /* Directory States */

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Directory States

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	\|----		\|----
	\|}		\|}


	If the directory has the block of memory in the GONE or EM state, then the directory must forward any incoming read/write requests for the block to the last cache that modified the block. That cache is responsible for updating main memory and the block that requested the data. This is why the directory must maintain a pointer to the first cache in the cache list.		If the directory has the block of memory in the GONE or EM state, then the directory must forward any incoming read/write requests for the block to the last cache that modified the block. That cache is responsible for updating main memory and the block that requested the data. This is why the directory must maintain a pointer to the first cache in the cache list.