CSC/ECE 506 Spring 2013/11a ad - Revision history

Adave: /* Cray X1 Supercomputer */

2013-04-19T05:10:33Z

Cray X1 Supercomputer

← Older revision		Revision as of 05:10, 19 April 2013
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	Figure above illustrates the architecture of a single Cray X1		Figure above illustrates the architecture of a single Cray X1
	node, the basic building block of the system.		node, the basic building block of the system.
	<center>[[Image:~~MSp~~.jpg ]]</center>		<center>[[Image:Msp.jpg ]]</center>
	<center> '''Figure. MSP Module''' </center>		<center> '''Figure. MSP Module''' </center>
	The		The

Adave: /* Cray X1 Supercomputer */

2013-04-19T05:10:11Z

Cray X1 Supercomputer

← Older revision		Revision as of 05:10, 19 April 2013
Line 418:		Line 418:
	Figure above illustrates the architecture of a single Cray X1		Figure above illustrates the architecture of a single Cray X1
	node, the basic building block of the system.		node, the basic building block of the system.
	Each MSP contains 4 SSPs		<center>[[Image:MSp.jpg ]]</center>
			<center> '''Figure. MSP Module''' </center>
			The
			design of the X1 is hierarchical in processor, memory,
			and interconnect. The basic component in this hierarchy
			is the multi-streaming processor (MSP), which is capable
			of 12.8 GF/s for 64-bit operations.Each MSP contains 4 SSPs
	each with 2 vector and 1 scalar unit		each with 2 vector and 1 scalar unit
	consists of four multi-streaming processors (MSPs) and a		consists of four multi-streaming processors (MSPs) and a

Adave: /* Benchmarks and applications Performancehttp://www.csm.ornl.gov/~worley/papers/CUG03.WorleyDunigan.X1.pdf */

2013-04-19T05:05:25Z

Benchmarks and applications Performancehttp://www.csm.ornl.gov/~worley/papers/CUG03.WorleyDunigan.X1.pdf

← Older revision		Revision as of 05:05, 19 April 2013
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	<b>NAS Benchmarks</b>		<b>NAS Benchmarks</b>
	Results are given for both an		Results are given for both an
	MPI implementation and a Co-Array Fortran implementation		MPI implementation and a Co-Array Fortran implementation. For the two
	~~due to Alan Wallcraft~~. For the two
	IBM systems, results are given for both MPI and		IBM systems, results are given for both MPI and
	OpenMP implementations.Due to the nature of the memory access patterns		OpenMP implementations.Due to the nature of the memory access patterns

Adave: Created page with "NOTE: This is a modified wiki.All references from the Sohlin's book and class notes have been avoided.This is a standalone resource which condenses data from research papers,henc..."

2013-04-19T05:03:41Z

Created page with "NOTE: This is a modified wiki.All references from the Sohlin's book and class notes have been avoided.This is a standalone resource which condenses data from research papers,henc..."

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