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CSC/ECE 506 Spring 2010/6 DD - Revision history
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Revision history for this page on the wiki
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https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31216&oldid=prev
Drdivech at 04:30, 6 March 2010
2010-03-06T04:30:05Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 04:30, 6 March 2010</td>
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<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div><del style="font-weight: bold; text-decoration: none;"></del></div></td><td colspan="2" class="diff-side-added"></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td></tr>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><center>Memory Hierarchy<sup>[2]</sup></center></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><center>Memory Hierarchy<sup>[2]</sup></center></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The cache which is closest to CPU is called Level 1 Cache or L1 cache. It is also known as primary cache. The size is between 8 KB – 128 KB. The next level is L2 cache (secondary cache) whose size is between 256 KB –1024 KB. If the data that CPU is looking for is not found in L1 cache, it'll look in L2 cache,then in the main memory, then finally in an external storage device. </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The cache which is closest to CPU is called Level 1 Cache or L1 cache. It is also known as primary cache. The size is between 8 KB – 128 KB. The next level is L2 cache (secondary cache) whose size is between 256 KB –1024 KB. If the data that CPU is looking for<ins style="font-weight: bold; text-decoration: none;">, </ins>is not found in L1 cache, it'll look in L2 cache,then in the main memory, then finally in an external storage device. </div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>This leads us to the introduction of two new terms: cache hit and cache miss.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>This leads us to the introduction of two new terms: cache hit and cache miss.</div></td></tr>
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Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31215&oldid=prev
Drdivech at 04:29, 6 March 2010
2010-03-06T04:29:17Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 04:29, 6 March 2010</td>
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<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div><del style="font-weight: bold; text-decoration: none;"></del></div></td><td colspan="2" class="diff-side-added"></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td></tr>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><center>[[Image: memchart.jpg|120p]]</center> <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><center>[[Image: memchart.jpg|120p]]</center> <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><center>Memory Hierarchy<sup>[2]</sup></center></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><center>Memory Hierarchy<sup>[2]</sup></center></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The cache which is closest to CPU is called Level 1 Cache or L1 cache. It is also known as primary cache. The size is between 8 KB – 128 KB. The next level is L2 cache (secondary cache) whose size is between 256 KB –1024 KB. If the data that CPU is looking for is not found <del style="font-weight: bold; text-decoration: none;">in registers, it seeks it </del>in L1 cache, <del style="font-weight: bold; text-decoration: none;">if not found, then </del>in L2 cache,then <del style="font-weight: bold; text-decoration: none;">to </del>the main memory, then finally <del style="font-weight: bold; text-decoration: none;">to </del>an <del style="font-weight: bold; text-decoration: none;"> </del>external storage device. </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The cache which is closest to CPU is called Level 1 Cache or L1 cache. It is also known as primary cache. The size is between 8 KB – 128 KB. The next level is L2 cache (secondary cache) whose size is between 256 KB –1024 KB. If the data that CPU is looking for is not found in L1 cache, <ins style="font-weight: bold; text-decoration: none;">it'll look </ins>in L2 cache,then <ins style="font-weight: bold; text-decoration: none;">in </ins>the main memory, then finally <ins style="font-weight: bold; text-decoration: none;">in </ins>an external storage device. </div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>This leads us to the introduction of two new terms: cache hit and cache miss.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>This leads us to the introduction of two new terms: cache hit and cache miss.</div></td></tr>
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Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31105&oldid=prev
Drdivech at 23:31, 3 March 2010
2010-03-03T23:31:59Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:31, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td></tr>
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Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31104&oldid=prev
Drdivech at 23:30, 3 March 2010
2010-03-03T23:30:34Z
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''MULTICORE Architecture'''==</div></td></tr>
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Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31103&oldid=prev
Drdivech at 23:30, 3 March 2010
2010-03-03T23:30:00Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:30, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''REFERENCES'''==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''REFERENCES'''==</div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm<del style="font-weight: bold; text-decoration: none;"><pre>&#9;[Talks about need for cache]</pre> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm <del style="font-weight: bold; text-decoration: none;">[Talks about L1, L2 cache sizes, hit and miss rates] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg <del style="font-weight: bold; text-decoration: none;">[Talks about Placement Policy & LRU] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[4]: Fundamentals of Parallel Computer Architecture by Prof.Yan Solihin <del style="font-weight: bold; text-decoration: none;">[Talks about Dual Core Memory hierarchy] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[4]: Fundamentals of Parallel Computer Architecture by Prof.Yan Solihin <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[5] : http://download.intel.com/technology/architecture/sma.pdf <del style="font-weight: bold; text-decoration: none;">[Talks about Smart cache] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[5] : http://download.intel.com/technology/architecture/sma.pdf <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[6]: http://www.pcguide.com/ref/mbsys/cache/funcMapping-c.html <del style="font-weight: bold; text-decoration: none;">[Talks about Placement Policy] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[6]: http://www.pcguide.com/ref/mbsys/cache/funcMapping-c.html <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[7]:http://en.wikipedia.org/wiki/Very_Long_Instruction_Word <del style="font-weight: bold; text-decoration: none;">[Talks about VLIW] </center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[7]:http://en.wikipedia.org/wiki/Very_Long_Instruction_Word <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[8]: http://en.wikipedia.org/wiki/Multi-core_processor <del style="font-weight: bold; text-decoration: none;">[Talks about recent multicore architectures] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[8]: http://en.wikipedia.org/wiki/Multi-core_processor <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[9]: http://en.wikipedia.org/wiki/Power_Architecture <del style="font-weight: bold; text-decoration: none;">[Talks about recent multicore architectures] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[9]: http://en.wikipedia.org/wiki/Power_Architecture <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[10]: http://www.intel.com/design/intarch/papers/cache6.pdf <del style="font-weight: bold; text-decoration: none;">[Talks about Write Policies] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[10]: http://www.intel.com/design/intarch/papers/cache6.pdf <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[11]: http://download.intel.com/design/archives/processors/pro/docs/24269001.pdf <del style="font-weight: bold; text-decoration: none;"> [Talks about Write Policies] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[11]: http://download.intel.com/design/archives/processors/pro/docs/24269001.pdf <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[12]: http://www.intel.com/Assets/PDF/manual/248966.pdf <del style="font-weight: bold; text-decoration: none;">[Talks about Write Policies] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[12]: http://www.intel.com/Assets/PDF/manual/248966.pdf <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[13]: http://www.intel.com/pressroom/kits/quickreffam.htm <del style="font-weight: bold; text-decoration: none;">[General Information] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[13]: http://www.intel.com/pressroom/kits/quickreffam.htm <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[14]: http://www.hardwaresecrets.com <del style="font-weight: bold; text-decoration: none;">[General Information] </center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[14]: http://www.hardwaresecrets.com <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[15]: http://en.wikipedia.org/wiki/Cache_algorithms#Pseudo-LRU <del style="font-weight: bold; text-decoration: none;">[Talks about Replacement policies] </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[15]: http://en.wikipedia.org/wiki/Cache_algorithms#Pseudo-LRU <br /></div></td></tr>
</table>
Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31102&oldid=prev
Drdivech at 23:27, 3 March 2010
2010-03-03T23:27:12Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:27, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm &#9;[Talks about need for cache] <br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm<ins style="font-weight: bold; text-decoration: none;"><pre></ins>&#9;[Talks about need for cache]<ins style="font-weight: bold; text-decoration: none;"></pre> </ins><br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td></tr>
</table>
Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31101&oldid=prev
Drdivech at 23:25, 3 March 2010
2010-03-03T23:25:53Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:25, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm <del style="font-weight: bold; text-decoration: none;"><pre></del>&#9;[Talks about need for cache] <del style="font-weight: bold; text-decoration: none;"></pre> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm &#9;[Talks about need for cache] <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td></tr>
</table>
Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31100&oldid=prev
Drdivech at 23:25, 3 March 2010
2010-03-03T23:25:26Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:25, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm [Talks about need for cache] <br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm <ins style="font-weight: bold; text-decoration: none;"><pre>&#9;</ins>[Talks about need for cache] <ins style="font-weight: bold; text-decoration: none;"></pre> </ins><br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td></tr>
</table>
Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31099&oldid=prev
Drdivech at 23:18, 3 March 2010
2010-03-03T23:18:00Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:18, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''REFERENCES'''==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=='''REFERENCES'''==</div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm<del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about need for cache] </<del style="font-weight: bold; text-decoration: none;">center</del>> </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm [Talks about need for cache] <<ins style="font-weight: bold; text-decoration: none;">br </ins>/></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm<del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about L1, L2 cache sizes, hit and miss rates] </<del style="font-weight: bold; text-decoration: none;">center</del>> <del style="font-weight: bold; text-decoration: none;"> </del></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm [Talks about L1, L2 cache sizes, hit and miss rates] <<ins style="font-weight: bold; text-decoration: none;">br </ins>/></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about Placement Policy & LRU] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg [Talks about Placement Policy & LRU] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[4]: Fundamentals of Parallel Computer Architecture by Prof.Yan Solihin <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about Dual Core Memory hierarchy] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[4]: Fundamentals of Parallel Computer Architecture by Prof.Yan Solihin [Talks about Dual Core Memory hierarchy] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[5] : http://download.intel.com/technology/architecture/sma.pdf <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about Smart cache]<del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[5] : http://download.intel.com/technology/architecture/sma.pdf [Talks about Smart cache] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[6]: http://www.pcguide.com/ref/mbsys/cache/funcMapping-c.html <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about Placement Policy] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[6]: http://www.pcguide.com/ref/mbsys/cache/funcMapping-c.html [Talks about Placement Policy] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[7]:http://en.wikipedia.org/wiki/Very_Long_Instruction_Word <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about VLIW] </center> <br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[7]:http://en.wikipedia.org/wiki/Very_Long_Instruction_Word [Talks about VLIW] </center> <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[8]: http://en.wikipedia.org/wiki/Multi-core_processor <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about recent multicore architectures] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[8]: http://en.wikipedia.org/wiki/Multi-core_processor [Talks about recent multicore architectures] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[9]: http://en.wikipedia.org/wiki/Power_Architecture <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about recent multicore architectures] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[9]: http://en.wikipedia.org/wiki/Power_Architecture [Talks about recent multicore architectures] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[10]: http://www.intel.com/design/intarch/papers/cache6.pdf <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about Write Policies] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[10]: http://www.intel.com/design/intarch/papers/cache6.pdf [Talks about Write Policies] <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[11]: http://download.intel.com/design/archives/processors/pro/docs/24269001.pdf [Talks about Write Policies] <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[11]: http://download.intel.com/design/archives/processors/pro/docs/24269001.pdf [Talks about Write Policies] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[12]: http://www.intel.com/Assets/PDF/manual/248966.pdf <del style="font-weight: bold; text-decoration: none;"><center> </del>[Talks about Write Policies] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[12]: http://www.intel.com/Assets/PDF/manual/248966.pdf [Talks about Write Policies] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[13]: http://www.intel.com/pressroom/kits/quickreffam.htm <del style="font-weight: bold; text-decoration: none;"><center> </del>[General Information] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[13]: http://www.intel.com/pressroom/kits/quickreffam.htm [General Information] <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[14]: http://www.hardwaresecrets.com <del style="font-weight: bold; text-decoration: none;"><center> </del>[General Information] </center> <br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[14]: http://www.hardwaresecrets.com [General Information] </center> <br /></div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[15]: http://en.wikipedia.org/wiki/Cache_algorithms#Pseudo-LRU <del style="font-weight: bold; text-decoration: none;"><center> </del>[Replacement policies] <del style="font-weight: bold; text-decoration: none;"></center> </del><br /></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[15]: http://en.wikipedia.org/wiki/Cache_algorithms#Pseudo-LRU [<ins style="font-weight: bold; text-decoration: none;">Talks about </ins>Replacement policies] <br /></div></td></tr>
</table>
Drdivech
https://wiki.expertiza.ncsu.edu/index.php?title=CSC/ECE_506_Spring_2010/6_DD&diff=31098&oldid=prev
Drdivech at 23:15, 3 March 2010
2010-03-03T23:15:46Z
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 23:15, 3 March 2010</td>
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<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm <del style="font-weight: bold; text-decoration: none;"> </del><center> [Talks about need for cache] </center> </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[1]: http://www.karbosguide.com/books/pcarchitecture/chapter10.htm<center> [Talks about need for cache] </center> </div></td></tr>
<tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm <center> [Talks about L1, L2 cache sizes, hit and miss rates] </center> </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[2]: http://www.real-knowledge.com/memory.htm<center> [Talks about L1, L2 cache sizes, hit and miss rates] </center> </div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg <center> [Talks about Placement Policy & LRU] </center> <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[3]: Computer Design & Technology- Lectures slides by Prof.Eric Rotenberg <center> [Talks about Placement Policy & LRU] </center> <br /></div></td></tr>
<tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[4]: Fundamentals of Parallel Computer Architecture by Prof.Yan Solihin <center> [Talks about Dual Core Memory hierarchy] </center> <br /></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[4]: Fundamentals of Parallel Computer Architecture by Prof.Yan Solihin <center> [Talks about Dual Core Memory hierarchy] </center> <br /></div></td></tr>
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Drdivech