https://wiki.expertiza.ncsu.edu/api.php?action=feedcontributions&feedformat=atom&user=RamccrawExpertiza_Wiki - User contributions [en]2026-05-17T06:05:19ZUser contributionsMediaWiki 1.41.0https://wiki.expertiza.ncsu.edu/index.php?title=CSC456_Spring_2012/ch1_dm&diff=56611CSC456 Spring 2012/ch1 dm2012-01-23T19:04:28Z<p>Ramccraw: Created page with "According to the text, since 1971 the number of transistors on a chip has increased from 2,300 to 167 million in 2006. Since 2006, this number has further increased to about 2 b..."</p>
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<div>According to the text, since 1971 the number of transistors on a chip has increased from 2,300 to 167 million in 2006. Since 2006, this number has further increased to about 2 billion. This is an increase of approximately 6 orders of magnitude. the clock frequency has also continued to rise, if a bit slower since 2006. At the time, it was around 2.4ghz, a 3k multiple of the speed in 1971 of 750khz. Now the high end clock speed of a processor is in the 3.3ghz range.</div>Ramccrawhttps://wiki.expertiza.ncsu.edu/index.php?title=ECE506_Main_Page&diff=56610ECE506 Main Page2012-01-23T19:00:34Z<p>Ramccraw: /* Supplements to Solihin Text */</p>
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<div>This page serves as a portal for all wiki material related to CSC506 and ECE506. Link to any new wiki pages from this page, and add links to any current pages.<br />
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=Supplements to Solihin Text=<br />
<br />
Post links to the textbook supplements in this section.<br />
*Chapter 1 [[CSC456 Spring 2012/ch1 dm | CSC456 Spring 2012/ch1 dm]]<br />
*Chapter 2 [[CSC/ECE 506 Spring 2011/ch2 dm | CSC/ECE 506 Spring 2011/ch2 dm]]<br />
*Chapter 2 [[Parallel_Programming_Models | Parallel Programming Models]]<br />
*Chapter 2 (Still being revised) [[CSC/ECE 506 Spring 2011/ch2 cl | CSC/ECE 506 Spring 2011/ch2 cl]]<br />
*Chapter 2a [[ CSC/ECE 506 Spring 2011/ch2a mc | Current Data-Parallel Architectures ]]<br />
*Chapter 3 (Final Revision) [[ CSC/ECE 506 Spring 2011/ch3 ab | Parallel Architecture Mechanisms and Programming Models ]]<br />
*Chapter 4a[[ CSC/ECE 506 Spring 2011/ch4a ob | Parallelization of Nelder Mead Algorithm ]]<br />
*Chapter 4a (Under Construction) [[ CSC/ECE_506_Spring_2011/ch4a_bm | Parallelization of Algorithms ]]<br />
*Chapter 4a [[ CSC/ECE 506 Spring 2011/ch4a zz | CSC/ECE 506 Spring 2011/ch4a zz ]]<br />
*Chapter 4b [[Chapter 4b CSC/ECE 506 Spring 2011 / ch4b]]<br />
*Chapter 6a (Under Construction) [[ CSC/ECE 506 Spring 2011/ch6a jp | CSC/ECE 506 Spring 2011/ch6a jp ]]<br />
*Chapter 6a (Under Construction) [[ CSC/ECE 506 Spring 2011/ch6a ep | CSC/ECE 506 Spring 2011/ch6a ep ]]<br />
*Chapter 6b (Ready for First Review) [[CSC/ECE 506 Spring 2011/ch6b ab | CSC/ECE 506 Spring 2011/ch6b ab]]<br />
*Chapter 7 (Under Construction) [[CSC/ECE 506 Spring 2011/ch7 jp | CSC/ECE 506 Spring 2011/ch7 jp]]<br />
*Chapter 8 [[CSC/ECE 506 Spring 2011/ch8 mc | CSC/ECE 506 Spring 2011/ch8 mc]]<br />
*Chapter 10 (Under Construction) [[CSC/ECE 506 Spring 2011/ch10 sb | CSC/ECE 506 Spring 2011/ch10 sb]]<br />
*Chapter 10a [[CSC/ECE_506_Spring_2011/ch10a_dc | CSC/ECE_506_Spring_2011/ch10a_dc]]<br />
*Chapter 11 [[CSC/ECE_506_Spring_2011/ch11_BB_EP | Chapter 11 Supplement]]<br />
*Chapter 11 [[Scalable_Coherent_Interface | SCI (Scalable Coherent Interface) ]]<br />
*Chapter 12 [[ CSC/ECE 506 Spring 2011/ch12 ob | Interconnection Network Topologies and Routing Algorithms]]<br />
*Chapter 12 (Ready for Final Review) [[ CSC/ECE 506 Spring 2011/ch12 aj | Interconnection Network Topologies and Routing Algorithms]]<br />
*Chapter 12 [[ CSC/ECE 506 Spring 2011/ch12 | Interconnection Network Topologies]]</div>Ramccraw