Scalable Coherent Interface

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Revision as of 18:37, 15 April 2011 by Mpsenn (talk | contribs) (Adding General operation section)
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SCI is an IEEE standard for shared-memory multiprocessing. The standard was approved in 1992. View the SCI Wikipedia article for more information on the interface's history. The article covers the cache-coherence portions of the IEEE standard.

General Operation

SCI operates by using directories in every processor's memory. When a memory block has not been cached, the directory holds this block in the Home state, signifying that the block is at home. After a read request, the memory holds this block in the Fresh state and will supply the data immediately to any requesting cache. After a write request, the memory holds the block in the Gone state. The memory does not supply the data to further requesting caches, but instead supplies the cache with an identifier for a cache that holds this data.

This cache is called the Head cache. Other caches that hold the data are stored in a distributed linked list, with each cache pointing to the previous and next caches in the list.

Cache State Machine

The caches states cover two different dimensions: the cache's position in a linked list, and the modified state of a block.

  • Head
  • Mid
  • Tail
  • Only
  • Clean
  • Modified
  • Fresh
  • Valid
  • Invalid

Directory State Machine

  • Home
  • Gone
  • Fresh

Race Conditions

References